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tlc5923 www.ti.com slvs550b ? december 2004 ? revised january 2013 16-channel led driver with dot correction check for samples: tlc5923 1 features ? tef: thermal error flag 2 ? 16 channels applications ? drive capability ? monocolor, multicolor, fullcolor led display ? 0 to 80 ma (constant-current sink) ? monocolor, multicolor led signboard ? constant current accuracy: 1% (typical) ? display backlighting ? serial data interface ? multicolor led lighting applications ? fast switching output: t r / t f = 10ns (typical) ? cmos level input/output description ? 30 mhz data transfer rate the tlc5923 is a 16 channel constant-current sink ? v cc = 3.0 v to 5.5 v driver. each channel has a on/off state and a 128- step adjustable constant current sink (dot correction). ? operating temperature = ? 40 c to 85 c the dot correction adjusts the brightness variations ? led supply voltage up to 17 v between led, led channels and other led drivers. ? 32-pin htssop( powerpad ? ) and qfn both dot correction and on/off state are accessible packages via a serial data interface. a single external resistor sets the maximum current of all 16 channels. ? dot correction the tlc5923 features two error information circuits. ? 7 bit (128 steps) the led open detection (lod) indicates a broken or ? individual adjustable for each channel disconnected led at an output terminal. the thermal ? controlled in-rush current error flag (tef) indicates an overtemperature ? error information condition. ? lod: led open detection functional block diagram 1 please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 powerpad is a trademark of texas instruments. production data information is current as of publication date. copyright ? 2004 ? 2013, texas instruments incorporated products conform to specifications per the terms of the texas instruments standard warranty. production processing does not necessarily include testing of all parameters. on/off input shift register dc input shift register 7?bit dc register delay x0 constant current driver lod mode 0 1 mode 0 1 0 15 111 0 on/off register 06 0 0 01 temperature error flag (tef) led open detection (lod) 7?bit dc register delay x1 constant current driver lod on/off register 7 13 1 1 7?bit dc register delay x15 constant current driver lod on/off register 105 111 15 15 blank 0 max. outn current gnd vcc sin sclk sout iref xerr xlat mode out0out1 out15 pgnd blank blank blank 16 16 112 1 rhb dap
tlc5923 slvs550b ? december 2004 ? revised january 2013 www.ti.com this integrated circuit can be damaged by esd. texas instruments recommends that all integrated circuits be handled with appropriate precautions. failure to observe proper handling and installation procedures can cause damage. esd damage can range from subtle performance degradation to complete device failure. precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ordering information (1) t a package part number (1) 32-pin, htssop, powerpad ? TLC5923DAP ? 40 c to 85 c 32-pin, 5 mm x 5 mm qfn tlc5923rhb (1) for the most current package and ordering information, see the package option addendum at the end of this document, or see the ti website at www.ti.com . absolute maximum ratings (1) (2) tlc5923 unit v cc supply voltage (2) ? 0.3 to 6 v i o output current (dc) i (out0) to i (out15) 90 ma v i input voltage range (2) v (blank) , v (xlat) , v (sclk) , v (sin) , v (mode) , v (iref) ? 0.3 to v cc + 0.3 v v (sout) , v (xerr) ? 0.3 to v cc + 0.3 v v o output voltage range (2) v (out0) to v (out15) -0.3 to 18 v hbm (jedec jesd22-a114, human body model) 2 kv esd rating cdm (jedec jesd22-c101, charged device model) 500 v t stg storage temperature range ? 40 to 150 c htssop (dap) 42.54 mw/ c power dissipation rating at (or above) t a = 25 c (3) qfn (rhb) 27.86 mw/ c (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) all voltage values are with respect to network ground terminal. (3) see slma002 for more information about powerpad ? recommended operating conditions ? dc characteristics min nom max unit v cc supply voltage 3 5.5 v v o voltage applied to output, (out0 - out15) 17 v v ih high-level input voltage 0.8 vcc vcc v v il low-level input voltage gnd 0.2 vcc v i oh high-level output current v cc = 5 v at sout ? 1 ma i ol low-level output current v cc = 5 v at sout, xerr 1 ma i olc constant output current out0 to out15 80 ma t a operating free-air temperature range -40 85 c 2 submit documentation feedback copyright ? 2004 ? 2013, texas instruments incorporated product folder links: tlc5923
tlc5923 www.ti.com slvs550b ? december 2004 ? revised january 2013 recommended operating conditions ? ac characteristics v cc = 3 v to 5.5 v, t a = -40 c to 85 c (unless otherwise noted) min typ max unit f sclk clock frequency sclk 30 mhz t wh0, t wl0 clk pulse duration sclk=h/l 16 ns t wh1 xlat pulse duration xlat=h 20 ns t su0 sin to sclk (1) 10 t su1 slck to xlat (dot correction data) 10 t su1a setup time sclk to xlat (on/off data) 10 ns t su2 mode to sclk 10 t su3 mode to xlat 10 t h0 sclk to sin 10 t h1 xlat to sclk (dot correction data) 10 t h1a hold time xlat to sclk (on/off data) 10 ns t h2 sclk to mode 10 t h3 xlat to mode 10 (1) " " and " " indicates a rising edge, and a falling edge respectively. electrical characteristics v cc = 3 v to 5.5 v, t a = ? 40 c to 85 c (unless otherwise noted) parameter test conditions min typ max unit v oh high-level output voltage i oh = ? 1 ma, sout v cc ? 0.5 v v ol low-level output voltage i ol = 1 ma, sout 0.5 v i i input current v i = v cc or gnd, blank, xlat, sclk, sin, mode ? 1 1 a no data transfer, all output off, v o = 1 v, r (iref) = 10 k ? 6 no data transfer, all output off, v o = 1 v, r (iref) = 1.3 15 k ? i cc supply current ma data transfer 30 mhz, all output on, v o = 1 v, 32 r (iref) = 1.3 k ? data transfer 30 mhz, all output on, v o = 1 v, 36 65 (1) r (iref) = 600 ? i olc constant sink current all output on, v o = 1 v, r (iref) = 600 ? 70 80 90 ma all output off, v o = 15 v, r (iref) = 600 ? , out0 to i lo0 0.1 a out15 leakage output current i lo1 v xerr = 5.5 v, no tef and lod 10 a i olc0 constant sink current error all output on, v o = 1 v, r (iref) = 600 ? , out0 to out15 1% 4% device to device, averaged current from out0 to out15, i olc1 constant sink current error 4% 8.5% r (iref) = 600 ? all output on, v o = 1 v, r (iref) = 600 ? , i olc2 line regulation 1 4 %/v out0 to out15, v cc = 3 v to 5.5 v all output on, v o = 1 v to 3 v, r (iref) = 600 ? , i olc3 load regulation 2 6 %/v out0 to out15 t (tef) thermal error flag threshold junction temperature, rising temperature (2) 150 160 180 c v (lod) led open detection threshold 0.3 0.4 v v (iref) reference voltage output r (iref) = 600 ? 1.20 1.24 1.28 v (1) measured at device start-up temperature. once the ic is operating (self heating), lower i cc values will be seen. see figure 18 . (2) not tested. specified by design. copyright ? 2004 ? 2013, texas instruments incorporated submit documentation feedback 3 product folder links: tlc5923
tlc5923 slvs550b ? december 2004 ? revised january 2013 www.ti.com dissipation ratings power rating derating factor power rating power rating package t a < 25 c above ta = 25 c t a = 70 c t a = 85 c 32-pin htssop with powerpad (1) 5318 mw 42.54 mw/ c 3403 mw 2765 mw soldered 32-pin htssop with powerpad (1) 2820 mw 22.56 mw/ c 1805 mw 1466 mw unsoldered 32-pin qfn 3482 mw 27.86 mw/ c 2228 mw 1811 mw (1) the powerpad is soldered to the pcb with a 2 oz. copper trace. see slma002 for further information. switching characteristics parameter test conditions min typ max unit t r0 sout(see (1) ) 16 rise time ns t r1 outn, v cc = 5 v, t a = 60 c, dcx = 7f (see (2) ) 10 30 t f0 sout (see (1) ) 16 fall time ns t f1 outn, v cc = 5 v, t a = 60 c, dcx = 7f (see (2) ) 10 30 t pd0 sclk to sout (see (3) (4) ) 30 t pd1 mode to sout (see (3) ) 30 t pd2 blank to out0 (see (5) ), sink current on/off 60 propagation delay time ns t pd3 xlat to out0 (see (5) ) 60 t pd4 outn to xerr (see (6) ) 1000 t pd5 xlat to i out (dot-correction) (see (7) ) 1000 t d output delay time outn to out(n+1) , outn to out(n+1) (see (5) ) 14 22 30 ns (1) see figure 4 . defined as from 10% to 90% (2) see figure 5 . defined as from 10% to 90% (3) see figure 4 , figure 14 (4) " " and " " indicates a rising edge, and a falling edge respectively. (5) see figure 5 and figure 14 (6) see figure 5 , figure 6 , and figure 14 (7) see figure 5 4 submit documentation feedback copyright ? 2004 ? 2013, texas instruments incorporated product folder links: tlc5923 12 3 4 5 6 7 8 9 10 11 12 13 14 15 16 3231 30 29 28 27 26 25 24 23 22 21 20 19 18 17 gnd blank xlat sclk sin pgnd out0out1 pgnd out2out3 out4 out5 pgnd out6out7 vcciref mode xerr sout pgnd out15 out14 pgnd out13 out12 out11 out10 pgnd out9 out8 thermal pad sout 24 pgnd 23 out15 22 out14 21 pgnd 20 out13 19 out12 18 out11 17 out10 16 pgnd 15 out9 14 out8 13 out7 12 out6 11 pgnd 10 out5 9 out4 8 out3 7 out2 6 pgnd 5 out1 4 out0 3 pgnd 2 sin 1 xerr 25 mode 26 iref 27 vcc 28 gnd 29 blank 30 xlat 31 sclk 32 rhb p ackage (t op view) (qfn) dap p ackage (t op view)
tlc5923 www.ti.com slvs550b ? december 2004 ? revised january 2013 terminal functions terminal no. i/o description name tssop qfn blank (light off). when blank=h, all outn outputs are forced off. when blank=l, blank 2 30 i on/off of outn outputs are controlled by input data. gnd 1 29 ground iref 31 27 i/o reference current terminal mode select. when mode=l, sin, sout, sclk, xlat are connected to on/off control mode 30 26 i logic. when mode=h, sin, sout, sclk, xlat are connected to dot-correction logic. out0 7 3 o constant current output out1 8 4 o constant current output out2 10 6 o constant current output out3 11 7 o constant current output out4 12 8 o constant current output out5 13 9 o constant current output out6 15 11 o constant current output out7 16 12 o constant current output out8 17 13 o constant current output out9 18 14 o constant current output out10 20 16 o constant current output out11 21 17 o constant current output out12 22 18 o constant current output out13 23 19 o constant current output out14 25 21 o constant current output out15 26 22 o constant current output 6, 9, 14, 2, 5, 10, pgnd power ground 19, 24, 27 15, 20, 23 data shift clock. note that the internal connections are switched by mode (pin #30). at sclk 4 32 i sclk , the shift-registers selected by mode shift the data. sin 5 1 i data input of serial i/f sout 28 24 o data output of serial i/f vcc 32 28 power supply voltage error output. xerr is open drain terminal. xerr transistions from h to l when lod or tef xerr 29 25 o detected. data latch signal. when mode = l (on/off data mode), xlat is an edge-triggered latch signal of on/off registers. the serial data in on/off input shift registers is latched into the on/off registers at the rising edge of xlat. when mode = h (dc data mode), xlat is a xlat 3 31 i level-triggered latch signal of dot correction registers. the serial data in dc input shift registers is written into dot correction registers when xlat = h. the data in dot correction registers is held constant when xlat = l. copyright ? 2004 ? 2013, texas instruments incorporated submit documentation feedback 5 product folder links: tlc5923
tlc5923 slvs550b ? december 2004 ? revised january 2013 www.ti.com pin equivalent input and output schematic diagrams (note: resistor values are equivalent resistance and not tested). figure 1. input equivalent circuit (blank, xlat, sclk, sin, mode) figure 2. output equivalent circuit figure 3. output equivalent circuit (xerr) parameter measurement information figure 4. test circuit for t r0 , t f0 , t pd0 , t pd1 figure 5. test circuit for t r1 , t f1 , t pd2 , t pd3 , t pd5 , t d 6 submit documentation feedback copyright ? 2004 ? 2013, texas instruments incorporated product folder links: tlc5923 outn 51 w 15 pf xerrgnd 20 sout 15 pf soutgnd 10 vcc input gnd 400
tlc5923 www.ti.com slvs550b ? december 2004 ? revised january 2013 parameter measurement information (continued) figure 6. test circuit for t pd4 copyright ? 2004 ? 2013, texas instruments incorporated submit documentation feedback 7 product folder links: tlc5923 xerr 470 k w
tlc5923 slvs550b ? december 2004 ? revised january 2013 www.ti.com principles of operation setting maximum channel current the maximum output current per channel is set by a single external resistor, r (iref) , which is placed between iref and gnd. the voltage on iref is set by an internal band gap v (iref) with a typical value of 1.24v. the maximum channel current is equivalent to the current flowing through r (iref) multiplied by a factor of 40. the maximum output current per channel can be calculated by equation 1 : (1) where: v iref = 1.24v typ. r iref = user selected external resistor (r iref should not be smaller than 600 ? ) figure 15 shows the maximum output current, i olc , versus r (iref) . in figure 15 , r (iref) is the value of the resistor between iref terminal to ground, and i olc is the constant output current of out0,.....out15. a variable power supply may be connected to the iref pin through a resistor to change the maximum output current per channel. the maximum output per channel is 40 times the current flowing out of the iref pin. the maximum current from iref equals 1.24v/600 ? . setting dot-correction the tlc5923 has the capability to fine adjust the current of each channel, out0 to out15 independently. this is also called dot correction. this feature is used to adjust the brightness deviations of led connected to the output channels out0 to out15. each of the 16 channels can be programmed with a 7-bit word. the channel output can be adjusted in 128 steps from 0% to 100% of the maximum output current i max . dot correction for all channels must be entered at the same time. equation 2 determines the output current for each outn: (2) where: i max = the maximum programmable current of each output dcn = the programmed dot-correction value for output n (dcn = 0, 1, 2 ...127) n = 0, 1, 2 ... 15 dot correction data are entered for all channels at the same time. the complete dot correction data format consists of 16 x 7-bit words, which forms a 112-bit wide serial data packet. the channel data is put one after another. all data is clocked in with msb first. figure 7 shows the dc data format. the dc15.6 in figure 7 stands for the 6 th most significant bit for output 15. figure 7. dc data format to input data into dot correction register, mode must be set to high. the internal input shift register is then set to 112 bit width. after all serial data is clocked in, a high level pulse of xlat signal connects the serial data to the dot correction register. the dot correction registers are level-triggered latches of xlat signal. the serial data is latched into the dot correction registers when xlat goes low. the data in dot correction registers is held constant when xlat is low. blank signal does not need to be high to latch in new data. since xlat is a level- triggered signal when mode is high, sclk and sin must not be changed while xlat is high. ( figure 14 ). 8 submit documentation feedback copyright ? 2004 ? 2013, texas instruments incorporated product folder links: tlc5923 dc 15.0 105 dc 15.6 111 dc 14.6 104 msb dc out15 dc 0.0 0 dc 1.0 7 dc 0.6 6 lsb dc out0 dc out14 ? dc out1 i outn i max dc n 127 i max v iref r iref 40
tlc5923 www.ti.com slvs550b ? december 2004 ? revised january 2013 output enable all outn channels of tlc5923 can switched off with one signal. when blank signal is set to high, all outn are disabled, regardless of on/off status of each outn. when blank is set to low, all outn work under normal conditions. table 1. blank signal truth table blank out0 - out15 low normal condition high disabled setting channel on/off status all outn channels of tlc5923 can be switched on or off independently. each of the channels can be programmed with a 1-bit word. on/off data are entered for all channels at the same time. the complete on/off data format consists of 16 x 1-bit words, which form a 16-bit wide data packet. the channel data is put one after another. all data is clocked in with msb first. figure 8 shows the on/off data format. figure 8. on/off data format to input on/off data into on/off register mode must be set to low. the internal input shift register is then set to 16 bit width. after all serial data is clocked in, a rising edge of xlat is used to latch data into the on/off register. the on/off register is an edge-triggered latch of xlat signal. blank signal does not need to be high to latch in new data. figure 14 shows the on/off data input timing chart. delay between outputs the tlc5923 has graduated delay circuits between outputs. these delay circuits can be found in the constant current block of the device (see functional block diagram). the fixed delay time is 20 ns (typical), out0 has no delay, out1 has 20 ns delay, out2 has 40 ns delay, etc. this delay prevents large inrush currents, which reduce power supply bypass capacitor requirements when the outputs turn on. the delay works during switch on and switch off of each output channel. leds that have not turned on before blank is pulled high will still turn on and off at the determined delayed time regardless of the state of blank. therefore, every led will be illuminated for the amount of time blank is low. serial interface data transfer rate the tlc5923 includes a flexible serial interface, which can be connected to microcontroller or digital signal processor. only 3 pins are in required to input data into the device. the rising edge of sclk signal shifts the data from sin pin to internal shift register. after all data is clocked in, a rising edge of xlat latches the serial data to the internal registers. all data is clocked in with msb first. multiple tlc5923 devices can be cascaded by connecting sout pin of one device with sin pin of following device. the sout pin can also be connected to controller to receive lod information from tlc5923. copyright ? 2004 ? 2013, texas instruments incorporated submit documentation feedback 9 product folder links: tlc5923 on/off data 15 msb on/off out15 on/off out14 on/off out13 0 lsb on/off out2 on/off out1 on/off out0
tlc5923 slvs550b ? december 2004 ? revised january 2013 www.ti.com figure 9. cascading devices figure 9 shows a example application with n cascaded tlc5923 devices connected to a controller. the maximum number of cascaded tlc5923 devices depends on application system and data transfer rate. equation 3 calculates the minimum data input frequency needed. (3) where: f_(sclk): the minimum data input frequency for sclk and sin. f_(update): the update rate of the whole cascaded system. n: the number of cascaded tlc5923 devices. operating modes the tlc5923 has different operating modes depending on mode signal. table 2 shows the available operating modes. the values in the input shift registers, dc register and on/off register are unknown just after power on. the dc and on/off register values should be properly stored through the serial interface before starting the operation. table 2. tlc5923 operating modes truth table mode signal input shift register mode low 16 bit on/off mode high 112 bit dot correction data input mode 10 submit documentation feedback copyright ? 2004 ? 2013, texas instruments incorporated product folder links: tlc5923 f_(sclk) 112 f_(update) n tlc5923 sin sout out0 out15 sclk mode xlat blank iref xerr tlc5923 sin sout out0 out15 sclk mode xlat blank iref xerr ic 0 ic n 5 sinsclk mode xlat blank xerr controller sout 100 k 100 nf v (led) v (led) v (led) v (led) v cc 100 nf v cc v cc
tlc5923 www.ti.com slvs550b ? december 2004 ? revised january 2013 error information output the open-drain output xerr is used to report both of the tlc5923 error flags, tef and lod. during normal operating conditions, the internal transistor connected to the xerr pin is turned off. the voltage on xerr is pulled up to v cc through a external pullup resistor. if tef or lod is detected, the internal transistor is turned on, and xerr is pulled to gnd. since xerr is an open-drain output, multiple ics can be or'ed together and pulled up to v cc with a single pullup resistor. this reduces the number of signals needed to report a system error. to differentiate lod and tef signal from xerr pin, lod can be masked out with blank = high. table 3. xerr truth table condition error information xerr temperature blank outn voltage tef lodn t j < t (tef) h don't care l l high-z (1) t j > t (tef) h l t j < t (tef) l outn > v (lod) l l high-z outn < v (lod) h l t j > t (tef) outn > v (lod) h l l outn < v (lod) h l (1) note: high-z indicates high impedance tef: thermal error flag the tlc5923 provides a temperature error flag (tef) circuit to indicate an overtemperature condition of the ic. if the junction temperature exceeds the threshold temperature t (tef) (160 c typical), tef becomes h and xerr pin goes to low level. when the junction temperature becomes lower than the threshold temperature, tef becomes l and xerr pin becomes high impedance. lod: led-open detection the tlc5923 has an led-open detector to detect broken or disconnected leds, which should be connected to the output. the led-open detector pulls the xerr pin down to gnd when the led open is detected. an open led is detected when the following three conditions are met: 1. blank is low 2. on/off data is high 3. the voltage of outn is less than 0.3 v (typical) the lod status of each output can also be read out from the sout pin. figure 10 shows the lod data format. table 4 shows the lod truth table. figure 10. lod data format copyright ? 2004 ? 2013, texas instruments incorporated submit documentation feedback 11 product folder links: tlc5923 lod data 0 lsb out2 out1 out0 lod lod lod 15 msb lod out15 out14 out13 lod lod
tlc5923 slvs550b ? december 2004 ? revised january 2013 www.ti.com table 4. lod data truth table led on/off lod bit good on 0 good off 0 bad on 1 bad off 0 key timing requirements to reading lod ? lod status flag the lod status flag becomes active if the output voltage is < 0.3 v (typical) when the output sink current turns on. there is a 1- s time delay from the time the output sink current turns on until the time the lod status flag becomes valid. the timing for each channel ? s lod status to become valid is shifted by the 30 ns channel-to- channel turn-on time. after blank goes low, out0 lod status is valid when tpd2 + tpd4 = 60 ns + 1 s = 1.06 s. out1 lod status is valid when tpd2 + tpd4 + td = 60 ns + 1 s + 30 ns = 1.09 s. out3 lod status is valid when tpd2 + tpd4 + 2*td = 1.12 s, and so on. ? lod internal latch the tlc5923 has an internal latch to hold each channel ? s lod status flag information, as shown in figure 11 . when mode is low, the lod status information is latched into this latch on the rising edge of xlat. this is an edge-triggered latch. to ensure that a valid lod status flag is latched, blank must be low when xlat goes high. after the rising edge of xlat, changes in the status flags do not affect the values in the lod latch. ? loading lod data to the input shift register the lod data must be transferred to the input shift register before it is available to be clocked out of sout. the internal shift register has a set/reset function that is controlled by the lod internal latch. while xlat is high, the lod internal latch holds the input shift register in either set or reset, depending on the value in the latch. this effectively puts the lod data into the input shift register where it remains as long as xlat is high. the values in the input shift register are unaffected by any other signals, including sin and sclk while xlat is high. during this time, the status of out15 is present on sout. ? latching lod data into the internal shift register while xlat is high, the status of out15 is present on sout. when xlat transitions low, all data is latched into the input shift register, and the lod internal latch is disconnected from the internal shift register. ? clocking lod data out of sout while xlat is low and sclk is low, the status of out15 is on sout. on the next rising edge of sclk, the status of out14 shifts to sout. each subsequent rising edge of sclk shifts the lod data out of sout. xlat must stay low until all lod data is clocked out of sout. see shifting the lod data out section for more details. 12 submit documentation feedback copyright ? 2004 ? 2013, texas instruments incorporated product folder links: tlc5923
tlc5923 www.ti.com slvs550b ? december 2004 ? revised january 2013 figure 11. lod flags and latches shifting the lod data out sout outputs the lod data as shown in figure 12 , where: ? xlat rising edge holds the lod status flag. sout outputs lod out15 data. blank must be low. ? xlat = h sets or resets the input shift register depending on each lod data. set/reset function is higher priority than shifting the register value. if xlat is high and the sclk pin is pulsed, all lod data are kept in the shift register and sout keeps the lod out15 data. ? xlat = l ready to shift out lod data by sclk. sout contains lod out15 data at this time. blank can be high or low during this time. ? sclk rising edge sout outputs lod out14 at the first sclk rising edge. sout outputs lod out13 at the second sclk rising edge, and continues to output the next lod data at each sclk rising edge. figure 12. the lod data of sout figure 13 shows the timing chart of reading lod data. copyright ? 2004 ? 2013, texas instruments incorporated submit documentation feedback 13 product folder links: tlc5923 xlat sclk sout lod out15 lod out14 lod out12 lod out13 16bit lod status flags 16bit lod internal latch input shift register gs register sin sout (fifo register)
tlc5923 slvs550b ? december 2004 ? revised january 2013 www.ti.com figure 13. timing chart of reading lod data 14 submit documentation feedback copyright ? 2004 ? 2013, texas instruments incorporated product folder links: tlc5923 mode xlat sclk sin blank out0 xerr at the rising edge of xlat while blank=l, lod status is latched into the internal edge-triggered register. tpd2: 60ns max td x 15 = 450ns max tpd4: 1000ns max 1510ns max led open when xlat=h, the internal edge-triggered register sets or resets the input shift register. >1000ns tpd2: 60ns max td x 15 = 450ns max tpd4: 1000ns max 1510ns max >1000ns out15 sout
tlc5923 www.ti.com slvs550b ? december 2004 ? revised january 2013 figure 14. timing chart example for on/off setting to dot-correction copyright ? 2004 ? 2013, texas instruments incorporated submit documentation feedback 15 product folder links: tlc5923 sclk sout sin mode xla t on/off mode data input cycle dc mode data input cycle blank xerr out0 out1 dc mode data input cycle on/off mode data input cycle on/off mode data input cycle t wh1 f sclk t wl0 t su1 t wh0 t h0 t pd0 t h2 t su2 t h1 t h3 t pd1 t pd1 t su3 t h3 t su3 t pd2 t pd4 t d t pd5 t pd2 t pd5 t pd3 on/of f lsb on/of f msb dc msb msb dc lsb dc msb dc msb dc lsb dc msb on/of f msb on/of f msb lsb on/of f msb on/of f msb on/of f msb on/off dc lsb dc lsb on/of f lsb dc on/of f msb?1 t su0 (current) (current) t d t su1a t h1a
tlc5923 slvs550b ? december 2004 ? revised january 2013 www.ti.com typical characteristics reference resistor output current vs vs output current required outputn voltage figure 15. figure 16. power dissipation supply current vs vs free-air temperature free-air temperature a. data transfer = 30 mhz / all outputs, on/v o = 1 v / r iref = 600 ? / av dd = 5 v figure 17. figure 18. power rating ? free-air temperature figure 17 shows total power dissipation. figure 18 shows supply current versus free-air temperature. 16 submit documentation feedback copyright ? 2004 ? 2013, texas instruments incorporated product folder links: tlc5923 0 10 20 30 40 50 60 70 ?50 ?30 ?10 10 30 50 70 90 110 130 150 i cc ? supply current ? ma t a ? free-air t emperature ? c 3 k2 k 1 k 0 ?40 ?20 0 20 40 4 k 5 k 6 k 60 80 100 t a ? free-air t emperature ? c ? power dissipation ? mw p d TLC5923DAPpowerp ad soldered tlc5923rhb TLC5923DAPpowerp ad unsoldered 827 100 1 k 10 k 100 k 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0 49.6 k 9.92 k 4.96 k 2.48 k 1.65 k 1.24 k 709 ? reference resistor ? i olc ? output current ? a r iref w v outn = 1 v dc = 127 992 0 10 20 30 40 50 60 70 80 90 100 0 0.50 1 1.50 2 2.50 3 i o ? output current ? ma v o ? required output v oltage ? v i max = 60 ma i max = 40 ma i max = 20 ma
tlc5923 www.ti.com slvs550b ? december 2004 ? revised january 2013 revision history note: page numbers of previous versions may differ from current version. changes from revision a (november 2005) to revision b page ? corrected device number from " tlc4923rhb " to " tlc5923rhb " in ordering info table. ................................................. 2 copyright ? 2004 ? 2013, texas instruments incorporated submit documentation feedback 17 product folder links: tlc5923
package option addendum www.ti.com 15-apr-2017 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples hpa00030dapr active htssop dap 32 2000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 85 tlc5923 TLC5923DAP active htssop dap 32 46 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 85 tlc5923 TLC5923DAPg4 active htssop dap 32 46 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 85 tlc5923 TLC5923DAPr active htssop dap 32 2000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 85 tlc5923 TLC5923DAPrg4 active htssop dap 32 2000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 85 tlc5923 tlc5923rhbr active vqfn rhb 32 3000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 85 tlc 5923 tlc5923rhbrg4 active vqfn rhb 32 3000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 85 tlc 5923 tlc5923rhbt active vqfn rhb 32 250 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 85 tlc 5923 tlc5923rhbtg4 active vqfn rhb 32 250 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 85 tlc 5923 (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material)
package option addendum www.ti.com 15-apr-2017 addendum-page 2 (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant tlc5923rhbr vqfn rhb 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 q2 tlc5923rhbt vqfn rhb 32 250 180.0 12.4 5.3 5.3 1.5 8.0 12.0 q2 package materials information www.ti.com 27-jul-2013 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) tlc5923rhbr vqfn rhb 32 3000 367.0 367.0 35.0 tlc5923rhbt vqfn rhb 32 250 210.0 185.0 35.0 package materials information www.ti.com 27-jul-2013 pack materials-page 2

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